1. Field of the Invention
The present invention relates to digital memory circuits used to store binary encoded video information. In particular, the present invention relates to means for configuring and addressing such digital memory circuits so as to accommodate the use of multiple memory circuits having dissimilar storage capacities and to maximize the efficiency of such usage.
2. Description of the Related Art
With the rapid advancements in digital circuit technology, digital video recorders are now a reality. A digital video recorder differs from the popular video cassette recorder ("VCR") in that it records video information in a digitized, or binary encoded, format. This difference is critical to applications involving image processing because digital image processing usually provides image processing capabilities far more sophisticated than its analog image processing counterpart.
An example of where digital image processing plays a key role is that of a television receiver capable of providing a picture-in-a-picture ("PIP") video display. While viewing a normal video display with such a television receiver, a viewer can selectively introduce a second video display within a smaller, predefined area within the original video display. One use for this is where the television viewer, while watching one channel's programming as the main display, can selectively view another channel's programming via the smaller PIP display. Further background information on such television receivers can be found in Hakamada, U.S. Pats. Nos. 4,725,888, 4,746,983 and 4,761,688, and Hakamada et al., U.S. Pats. Nos. 4,729,027, 4,774,582 and 4,777,531.
One way to provide a PIP video display is to use a digital video recorder. The circuitry constituting the digital video recorder receives two analog video signals, where one constitutes the primary signal intended to be the main display and the other constitutes the secondary signal intended to be the PIP display. The digital video recorder digitizes these signals and stores them within its digital memory. This stored, digitized video information is subsequently read out in the appropriate manner to be converted back to analog video information and produce both a main display and the PIP display.
Depending upon such factors as the desired resolutions of the reproduced video displays and/or the potential time delays to be introduced in displaying the stored video information, more or less video information will need to be stored. For example, an NTSC standard video signal consists of successive "frames" of 525 lines made up of two interlaced "fields" of 2621/2 lines each. Furthermore, an NTSC standard video signal consists of 30 frames per second. Thus, as will be appreciated by one of ordinary skill in the art, depending upon the desired resolutions of the video displays and/or the potential time delays to be introduced, a greater or lesser number of frames will need to be stored. This in turn, translates to a potential need for a selectively variable storage capacity within the digital memory circuits within the digital video recorder.
It will be appreciated by one of ordinary skill in the art that one way to provide for this selective variability in storage capacity is to use multiple, interchangeable circuit card assemblies ("CCAs") to hold the digital memory devices used for storing the video information. By installing the appropriate CCAs, which in turn contain the appropriate digital memory devices, into the digital video recorder, selectively variable amounts of video information (e.g., video frames) can be stored and read out as desired.
Generally, a video data memory CCA uses a single memory address bus for writing and reading video data into and out from its memory, respectively. To have and use more than one memory address bus on a video data memory CCA would greatly increase the complexity of the wiring backplane and programming (i.e., software) necessary to handle dual memory address buses, particularly at the speeds at which the video data must be transferred.
Therefore, when video data is being written into memory locations in memory devices located on one video data memory CCA, other video data being read out simultaneously for a video display (or storage elsewhere) must be read out from corresponding memory locations in other memory devices located on a separate video data memory CCA. Thus, at least two video data memory CCAs are needed to allow incoming video data to be stored while previously stored video data is being read out for simultaneous, albeit time-delayed, display.
For example, a digital video recorder can use four video data memory CCAs, each having a storage capacity of up to 32 video frames, to store its video data. These four video data memory CCAs are paired together, with each pair used to simultaneously store and read out, as discussed above, video data representing up to double the number of video frames of which each video data memory CCA is capable of storing.
Of course, implicit in this is the requirement, or virtual requirement, that all four video data memory CCAs, or at least both within each pair, provide equal data storage capacities. If their storage capacities are not equal, then any additional storage capacity of the larger capacity video data memory CCA beyond that of the smaller capacity video data memory CCA will be unused, and therefore wasted. For example, if one video data memory CCA is capable of storing up to 16 video frames, while the others (or at least its mate) are capable of storing only up to eight video frames, then only eight video frames worth of its storage capacity will be used because of the simultaneous write and read operations, as discussed above.
Therefore, it would be desirable to have a digital video recorder which would allow for the installation and memory efficient use of multiple video data memory CCAs without regard for their respective data storage capacities. It would be further desirable to provide a means by which a digital video recorder could recognize and compensate for substitutions of video data memory CCAs having data storage capacities different from the remaining video data memory CCAs, while minimizing the amount of unused or wasted data storage capacity otherwise caused by such differences in relative data storage capacities.